1. Addition operation ADD/ADDD

1. Addition operation ADD/ADDD

1.1. Instruction description

The instruction (ADD) adds two 16 bit integers and produces a 16 bit integer result (OUT). The operand of instruction (ADDD) is 32 bits.

Related registers Description
M8169 Operation overflow.
M8170 The result of the operation is negative.
M8171 The result of the operation is 0.

1.2. The valid operands of the instruction

1.2.1. Single word instruction(ADD)

Input/Output Data Type operand Description
IN1 16 bit integer D/CV/TV/AI/AO/K/H/V/Z/FD, bit composite word (X/Y/M/C/T/S), local variable (LW) Input 1
IN2 16 bit integer D/CV/TV/AI/AO/K/H/V/Z/FD, bit composite word (X/Y/M/C/T/S), local variable (LW) Input 2
OUT 16 bit integer D/CV/TV/AO/V/Z, bit composite word (Y/M/C/T/S), local variable (LW) output

1.2.2. Double word instruction(ADDD)

Input/Output Data Type operand Description
IN1 32-bit integer D/CV/K/H/FD, bit composite word (X/Y/M/C/T/S), local variable (LD) Input 1
IN2 32-bit integer D/CV/K/H/FD, bit composite word (X/Y/M/C/T/S), local variable (LD) Input 2
OUT 32-bit integer D/CV, bit composite word (Y/M/C/T/S), local variable (LD) output

1.3. Example

Command table:

NETWORK 000

LD X000

ADD D0 D1 D2 // D0 + D1 = D2

ADD

图1 ADD