1. Variable frequency pulse output PLSF

1. Variable frequency pulse output PLSF

1.1. Instruction Description

  1. The PLSF instruction for variable frequency pulse output can be used for continuous output of variable pulse frequency, with no acceleration or deceleration time during frequency jumps.

  2. When the input terminal is turned on, the continuous output pulse starts immediately at the set pulse frequency, and the pulse frequency can be adjusted until the input terminal of the pulse command is turned off. The PLSF instruction can output a frequency range of 0Hz~200KHz. When the output frequency is greater than 200KHz, it is output at 200KHz;

  3. For 16 point transistor type PLCs, Y0~Y1 are high-speed pulse output ports, and for 32/50/66 point transistor type PLCs, Y0~Y3 are high-speed pulse output ports; Relay type PLCs do not have high-speed pulse function, and the maximum output frequency of the output port is determined by the closing time of the relay. For multi pulse series PLCs, their high-speed pulse output ports are Y0~Y7 and Y10~Y11.

  4. The instruction does not include a directional output port. When the user needs it, the directional signal output port number and signal control can be customized and set by the user. For example, in the example wiring diagram, the directional signal output ports Y2, Y3, and Z-phase inputs can be defined by the user.

Pulse accumulation counting (read-write):
register Pulse port
D8140(D8141) Y000
D8142(D8143) Y001
D8144(D8145) Y002
D8146(D8147) Y003
For multi pulse series PLCs, the following registers are also available:
register Pulse port
D8148(D8149) Y004
D8150(D8151) Y005
D8152(D8153) Y006
D8154(D8155) Y007
D8156(D8157) Y010
D8158(D8159) Y011
32-bit pulse cumulative count overflow flag, overflow is 1 (read-only):
register Pulse port
M8118 Y000
M8119 Y001
M8120 Y002
M8121 Y003
For multi pulse series PLCs, the following registers are also available:
register Pulse port
M8122 Y004
M8123 Y005
M8124 Y006
M8125 Y007
M8126 Y010
M8127 Y011

1.1.1. Attention:

  1. The output frequency of PLSF is a 32-bit positive integer, occupying two consecutive D registers;

  2. For high-speed pulse output, it is designed for external high-speed devices. To count the pulses, only a high-speed pulse input counter can be used, and internal counters cannot be used, nor can Y edge changes be used for counting.

  3. The OFF time of transistors has the characteristic of being prolonged under light loads. So, when responsiveness is required, please design a load resistor to increase the load current when the load is lighter;

  4. For the pulse output Y0, the number of pulses is accumulated in register D8140 (D8141), where D8141 stores the high 16 bits and D8140 stores the low 16 bits;

  5. The pulse accumulation count registers (D8140~D8158) are important registers that can be read and written. When a new value is written, the count will be added or subtracted based on the new value;

  6. Due to the fact that the pulse output of this instruction does not have a direction, the pulse accumulation count registers (D8140~D8158) can only count in the positive direction;

  7. When outputting high-speed pulses, the values in the pulse accumulation count registers (D8140~D8158) are discontinuous and constantly changing. When used for judgment, please use size comparison instead of equal judgment.

  8. When the pulse command is used to output port Y, the Y port cannot be used for other purposes, that is, ordinary commands cannot perform ON or OFF operations on the Y port anymore.

  9. If the frequency of multiple pulse exceeds 200K, a pull-up resistor needs to be added to the pulse output port to ensure that the pulse waveform is not distorted. The pull-up voltage is 24V, and the recommended pull-up resistor is 1K.

1.2. The valid operands of the instruction

Input/Output Data Type operand Description
F 32-bit integer D/CV/K/H/FD, bit composite word (X/Y/M/C/T/S), local variable (LD) frequency
OUT ON/OFF Y Pulse

1.3. Example

1.3.1. wiring diagram:

Brief schematic diagram

图1 Brief schematic diagram

Command table:

NETWORK 000

LDP M8151//M8151 rising edge assignment, must be rising edge to prevent PLC scanning from duplicate assignment

MOVD K400 D0//Initial frequency

NETWORK 001

LDP M1

MOVD K900 D0//Change the value D0D1

NETWORK 002

LDP M2

MOVD K650 D0//Change the value D0D1

NETWORK 003

LDP M3

MOVD K500 D0//Change value D0D1

NETWORK 004

LD M0

PLSF D0 Y000//When M0 is' 1 ', output a pulse with a frequency of D0D1 at Y000. Otherwise, the pulse output stops and the pulse frequency will change with the value of D0D1.

PLSF11

图2 PLSF11

PLSF12

图3 PLSF12