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1. Pulse Width Modulation PWM

1. Pulse Width Modulation PWM

1.1. Instruction Description

  1. Pulse width modulation (PWM) command generates a pulse output with variable pulse frequency and variable duty cycle, with no acceleration or deceleration time during frequency jumps.

  2. When the input terminal is turned on, continuous output pulses are immediately started at the set pulse frequency and duty cycle. The pulse frequency and duty cycle can be adjusted during the process until the prerequisite for the pulse command is disconnected. The 32-bit PWM command can output a frequency range of 0Hz~200KHz and a duty cycle range of 0~100%. The duty cycle adjustment range is 0~100%. Due to the frequency distortion of high-frequency pulses, the frequency should not be too high when accurately controlling the pulse width.

  3. For 16 point transistor type PLCs, Y0~Y1 are high-speed pulse output ports, and for 32/50/66 point transistor type PLCs, Y0~Y3 are high-speed pulse output ports; Relay type PLCs do not have high-speed pulse function, and the maximum output frequency of the output port is determined by the closing time of the relay. For multi pulse series PLCs, their high-speed pulse output ports are Y0~Y7 and Y10~Y11.

Pulse accumulation counting (read-write)：
register Pulse port
D8140(D8141) Y000
D8142(D8143) Y001
D8144(D8145) Y002
D8146(D8147) Y003
For multi pulse series PLCs, the following registers are also available：
register Pulse port
D8148(D8149) Y004
D8150(D8151) Y005
D8152(D8153) Y006
D8154(D8155) Y007
D8156(D8157) Y010
D8158(D8159) Y011
32-bit pulse cumulative count overflow flag, overflow is 1 (read-only)：
register Pulse port
M8118 Y000
M8119 Y001
M8120 Y002
M8121 Y003
For multi pulse series PLCs, the following registers are also available：
register Pulse port
M8122 Y004
M8123 Y005
M8124 Y006
M8125 Y007
M8126 Y010
M8127 Y011

1.1.1. Attention：

  1. The PWM output frequency and duty cycle are 32-bit positive integers, occupying two consecutive D registers;

  2. For high-speed pulse output, it is designed for external high-speed devices. To count the pulses, only the high-speed pulse input counter can be used, and internal counters cannot be used, nor can Y edge changes be used for counting;

  3. The OFF time of transistors has the characteristic of being prolonged under light loads. So, when responsiveness is required, please design a load resistor to increase the load current when the load is lighter;

  4. For the pulse output Y0, the number of pulses is accumulated in register D8140 (D8141), where D8141 stores the high 16 bits and D8140 stores the low 16 bits;

  5. The pulse accumulation count registers (D8140~D8158) are important registers that can be read and written. When a new value is written, the count will be added or subtracted based on the new value;

  6. Due to the fact that the pulse output of this instruction does not have a direction, the pulse accumulation count registers (D8140~D8158) can only count in the positive direction;

  7. When outputting high-speed pulses, the values in the pulse accumulation count registers (D8140~D8158) are discontinuous and constantly changing. When used for judgment, please use size comparison instead of equal judgment;

  8. When the frequency is too high, there may be waveform distortion. To achieve precise pulse width control, the pulse frequency should not be too high.

  9. When the pulse command is used to output port Y, the Y port cannot be used for other purposes, that is, ordinary commands cannot perform ON or OFF operations on the Y port anymore.

  10. If the frequency of multiple pulse exceeds 200K, a pull-up resistor needs to be added to the pulse output port to ensure that the pulse waveform is not distorted. The pull-up voltage is 24V, and it is recommended to use a pull-up resistor of 1K.

1.2. The valid operands of the instruction

Input/Output Data Type operand Description
F 32-bit integer D/CV/K/H/FD, bit composite word (X/Y/M/C/T/S), local variable (LD) frequency
DC 32-bit integer D/CV/K/H/FD, bit composite word (X/Y/M/C/T/S), local variable (LD) duty cycle
OUT ON/OFF Y Pulse

1.3. Example

Command table:

NETWORK 000

LD M0

PWM D0 D2 Y000 // When M0 is' 1 ', Y000 outputs a pulse with a frequency of D0D1 and a duty cycle of D2D3 percent

PWM

图1 PWM